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labobot_vhd
- descripcion de una memoria ram usando verilog
writing
- 关于RAM/ROM的一个写操作的程序，语言为verilog-On RAM/ROM, a write operation procedures, language verilog
ram_sp_ar_sw.v
- this is a verilog source code for Single Port RAM Synchronous Read/Write.
ram_sp_sr_sw.v
- this is a verilog source code for Single Port RAM Synchronous Read/Write.
ram_dp_sr_sw.v
- this is a verilog source code for Dual Port RAM Synchronous Read/Write.
dpram
- 包含整个工程，是用verilog来编写，实现双口ram的功能-Contains the entire project is to write Verilog to achieve the function of the dual-port ram
or1200_sopc
- 用verilog语言编写的or1200+wishbone总线+串口uart+片上ram，最小系统soc。包括片上ram的软件系统（C语言编写）都有。但下载者要使用此系统需要很多工具链，搞soc的应该都装好了。 绝对原创！用quartusII11.0在Altera DE2-115上验证通过，Modelsim SE 6.5f仿真通过。-It s very strange for Chinese people communicating with each other in English. Ri
ram2x128
- this 2x128 ram code in verilog-this is 2x128 ram code in verilog
dw8051-used-in-FPGA
- 自己下载的dw8051核，并在atlys fpga开发板上运行成功。其中rom和ram都已经生成，4个并行I/O口也有。编程语言是verilog。另外，还有hex转in文件的小软件，以及Uedit这个文本编辑器，它是用来给dw8051的rom载入程序的。-The the dw8051 nuclear, download and run atlys fpga development board. Rom and ram have been generated, there are four par
dualram
- 本文件给出了一种双口RAM的代码，开发语言为verilog。测试可用，欢迎下载-This document gives a dual-port RAM code verilog development language. Test is available, welcome to download
ddr-sdram
- It is complete document for DDR SD RAM program in verilog hdl
VeriRISC_CPU_Verilog
- Verilog硬件描述语言实现VeriRISC CPU。模块包含：8位寄存器，5位计数器，32*8 RAM，8位ALU，MUX，顺序控制器，时钟生成器。包含TB。-This code is to model a VeriRISC CPU. It incorporates several modules: 8-bit register, 5-bit counter, 32 by 8 RAM, 8-bit ALU, scalable MUX, sequence controller, and clo
32_by_8_RAM
- 32*8 RAM。Verilog实现。包含TB。-32 by 8 RAM. Testbench included.
fpgaaverilogamaxamin
- verilog 编写的比较最大值最小值得的程序，而且能够求出最大最小值在ram中存储的位置，测试通过下载即用-Comparison of the maximum write verilog smallest worthwhile program, and minimum and maximum values can be obtained is stored in ram position, the test that is used by downloading
bram_16x8_top
- 使用Verilog语言编写的RAM程序,可以双向读写,在Xilinx Spartan-6上运行通过,是很好的Verlog程序-RAM using Verilog language program, you can bi-literacy, in the Xilinx Spartan-6 run through, is a very good program Verlog
LPM_RAM
- verilog 参数可设置调用模块RAM-verilog parameter can be set to call the module RAM
idt723641
- VERILOG双端口驱动IDT的双扣RAM很好用的-VERILOG Twill the IDT dual-port RAM drive good use
try_ram
- Verilog Codes for RAM-Testing. Write data in the RAM and read it out from the RAM. Tested on NEXYS 3.
9288Test3
- AD9288 100MhzAD转换芯片的控制代码，用Verilog语言实现。采集数据存储于FPGA内置RAM中。-Conversion chip AD9288 100MhzAD control code, using Verilog language. FPGA collected data is stored in the built-in RAM.
DW8051
- verilog代码，51内核，是DW8051，8K ram 64K rom强大版本-verilog code, 51 cores, is DW8051, 8K ram 64K rom powerful version